In general, a liquid crystal display consist of two sheets of glass substrate having liquid crystal being injected between them, which is used to make an image thereon utilizing the alteration of optical property of a liquid crystal cell on changing the array of liquid crystals by application of voltage.
Such liquid crystal display is classified into simple matrix driving method and active matrix driving method. Active matrix driving method in which TFT-LCD(Thin Film Transistor-LCD) is typical, is a driving method that each pixel pole is attached with active element so that each pixel can be driven independently minimizing the influence from the data signal of adjacent pixel, which allows to obtain high contrast ratio and to increase number of scanning lines.
Conventional liquid crystal display is to be explained hereinafter referring to attached drawings.
FIG. 1 is a plan view of a conventional active matrix driving type liquid crystal display, FIG.2 is a sectional view of A--A' line of FIG. 1, and FIG. 3 is a sectional view of B--B' line of FIG. 1, wherein the conventional liquid crystal display includes gate lines 2(only two lines are shown in FIG. 1) formed in one direction with a certain distance between them, data lines 3 formed rectangular to the gate lines 2, transparent poles 6 formed between each gate lines 2 and each data lines 3 for driving the liquid crystal cells, and thin film transistors formed at the crossing parts of the gate lines 2 and data lines 3 for applying signals to the pixel poles.
The production method of a conventional liquid crystal display described above is as follows.
As shown in FIG. 2 and FIG. 3, deposit a semiconductor layer 1 of polycrystalline silicon or amorphous silicon on an insulating transparent substrate 9 of glass or quartz and form active areas of thin film transistors by means of patterning, leaving only the areas that the thin film transistor is to be formed thereon, then, deposit a gate insulation film 8 and metal are successively on the overall surface, and remove the deposited metal selectively to form the gate electrodes and the gate lines 2, thereafter, wherein the gate lines 2 are formed in plurality with a certain distance as shown in FIG. 1, and the gate electrodes connected to the gate lines are formed on the semiconductor layer 1.
After forming source/drain areas by injecting n+ions into the semiconductor layer using the gate electrodes as mask and deposition of an insulation film 7 on the overall surface, form the transparent poles which are pixel poles and the data lines 3 successively in the pixel areas, and remove the insulation film 7 selectively thereafter to expose above source/drain areas so as to the contact holes 5 to be formed, and deposit metals 3 and 4 and carry out patterning to connect each data lines 3 to the source areas and each transparent pole 6 to the drain areas.
However, in developing high definition, large size display having many pixels, it is found that parasitic capacitance is caused to form at the crossing parts(D in FIG. 1) of the gate lines and the data lines. This parasitic capacitance has been a problem in developing high definition, large size liquid crystal display because this parasitic capacitance acts as a factor of increasing the delay time of the gate signal making the response time slow, and in case the width of the gate lines and the data lines are decreased in order to decrease the parasitic capacitance, the problem still exists because the width can not be decreased without limit due to the increase of line resistance, which will decrease the element characteristics, and due to the difficulties in design and production.